I’ve done a series of posts on steps that the Renesas RX microcontroller (MCU) design team took to maximize code density, thereby minimizing system memory requirements, Today, let’s look at some benchmarks based on actual applications that demonstrate the code-density advantage.
For a quick review, I covered the concept of op-code optimization a couple of months back. I followed that up with posts that focused specifically on the BSR, ADD, BEQ, CMP, and MOV instructions. Those instructions were found to be the most frequently used instructions in an analysis that the RX design team conducted on actual application code. So those instructions were targeted for optimization in terms of minimum instruction length.
The RX team compared a number of MCUs against the RX for code density and the RX won in every instance. Let’s focus on comparisons with an ARM Cortex-M3 MCU since that architecture is proving popular and is the ARM flavor that the company has optimized for code density.
For the purpose of comparison, the engineers used the RX code side as the reference case with a relative measure of 1. The results from the ARM MCU test can then be easily compared.
First the team ran a motor-control application developed for an air conditioner. The ARM code was 30% larger with a relative measure of 1.4.The team then benchmarked a data-communication application that was developed for a printer. The ARM code was 23% larger than the RX code.
Next up, the team examined a data-conversion application written for a fax machine. The ARM measured just under 1.4 for a 25% greater code footprint. A real-time-control application for an automotive breaking system resulted in 33% larger code for the ARM MCU.
The greatest advantage delivered by the RX came in a motor-control application for an automobile. The ARM measure was just above 1.6 for a 38% larger code footprint. The final system-control application from a car audio system showed ARM to have 33% larger code.
The real message here is not just that the RX delivers better code density but that it does so as an uncompromised 32-bit CISC processor that takes full advantage performance wise of that 32-bit architecture. And as I covered in a performance benchmark post, the RX also wins convincingly over the Cortex-M3 from the performance perspective.
This blog post was originally published on the Renesas Rulz Dr. Micro blog.
Maury Wright
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